The present invention relates to a digital audio interface signal demodulating apparatus that receives a digital audio interface signal for use in data transmission between digital audio equipments, and demodulates into a digital audio signal.
Standards for digital audio signal transmission between digital audio equipments such as a compact disc i(CD), digital audio tape recorder (DAT), and a mini disc (MD) include IEC (International Commission)-958 xe2x80x9cDigital Audio Interfacexe2x80x9d, and EIAJ (Electronic Industries Association of Japan)-CP-1201 xe2x80x9cDigital Audio Interfacexe2x80x9d.
FIG. 10 shows outlines of a digital audio interface based on these standards. For CDs, DATs, and MDs, an audio sample is composed of two channels: a left channel and a right channel. Two data units each called a sub-frame respectively represent a channel 1 and a channel 2, and form, as a set, one sample. The period of this one sample exactly corresponds to a period that is a submultiple of a sampling frequency FS. Also, 192 samples forms one block.
One sub-frame is composed of periods of 64T, where T is a time that is one-128th of a sampling period, and represents data for 32 bits. This T is a minimum inverse period of the digital audio interface signal. The contents of one sub-frames include a preamble for 8T (4 bits), reserve data for 8T (4 bits), audio sample data for 40T (20 bits), and additional data for 8T (4 bits). The additional data is composed of a validity flag V, a user""s bit U, a channel status C, and a parity P.
The reserve data, the audio sample data, and the additional data except for the preamble, have been bi-phase-mark modulated. Each of these is represented by 2T if 0 or successive 1T if 1, and has two patterns based on the immediately preceding logic.
The preamble is for indicating synchronization of sub-frames at transmission, and is so formed as to include 3T, which is not used in bi-phase-mark modulation, at the head in order to have unique periodic patterns. With three periodic patterns B, M, and W, the block head of each of 192 frames and the channels 1 and 2 can be identified. Hereinafter, the preamble is referred to as PA, a preamble having the periodic pattern B is as a preamble PAb, a preamble having the periodic pattern M is as a preamble PAm, and a preamble having the periodic pattern W is as a preamble PAw.
FIG. 11 shows a conventional demodulating apparatus that demodulates the above digital audio interface signal. A conventional digital audio interface signal demodulating apparatus DDAC includes a preamble detection circuit 101, an analog PLL circuit 102, and a bi-phase demodulation circuit 103.
The preamble detection circuit 101 detects a 3T detection signal in a digital audio interface signal Sdai, and outputs a preamble detection signal Spd.
In the PLL circuit 102, the phase is locked to the preamble detection signal Spd, and a synchronous clock Ssc having a 32-times frequency is outputted therefrom.
The bi-phase demodulation circuit 103 carries out bi-phase demodulation on the digital audio interface signal Sdai by using the synchronous clock Ssc, and outputs a digital audio signal Sda.
FIG. 12 shows the operation timing of the digital audio interface signal demodulating apparatus DDAc. As shown in FIG. 12, the preamble detection circuit 101 detects an inverse interval equal to or more than 2.5T, based on the reference clock Ssc having a period shorter than a minimum inverse interval of the digital audio interface signal Sdai, and outputs the preamble signal Spd.
The PLL circuit 102 forms an analog phase locked loop (PLL) by using a VCO, for comparing, in phase, 32 frequency divisions of the VCO and the preamble detection signal Spd, and outputting the synchronous clock Ssc having the 32-times frequency.
The bi-phase demodulation circuit 103 extracts a signal from the digital audio interface signal Sdai based on the synchronous clock Ssc, and outputs 1 if the signal differs from the immediately preceding one, and 0 if it matches the same, thereby outputting a digital audio signal Sda.
As stated above, the conventional digital audio interface signal demodulating apparatus detects the preamble of a digital audio interface signal, generates a clock that synchronizes with the digital audio interface signal by using an analog PLL, and demodulates the digital audio interface signal Sdai, which is a bi-phase-mark signal. However, the digital audio interface signal demodulating apparatus has such problems caused by the analog PLL circuit as described below. For realizing LSI, compared with a digital circuit, the analog PLL occupies a larger area on an LSI, thereby causing an increase in LSI cost.
To construct the analog PLL circuit, analog circuits such as a VCO and low-pass filter are required, and therefore the number of components is increased. As a result, the degree of integration in the PLL circuit and the digital audio interface signal demodulating apparatus cannot be increased, thereby increasing production cost.
The analog PLL circuit consumes large power, leading to large power consumption of the digital audio interface signal demodulating apparatus, which is problematic in view of energy conservation. Especially, depending on power consumption, the life of a battery in a portable device greatly varies.
In the analog PLL circuit, changes in capabilities or characteristics with time over operation time are too large to be negligible. Consequently, some measures have to be taken against changes with time after the apparatus is released incorporated in audio equipment.
Furthermore, the conventional digital audio signal demodulating apparatus requires two asynchronous clocks, a reference clock and a PLL clock.
These problems above are obstructive, especially for realizing LSI of the digital audio signal demodulating apparatus, to its stability and reliability, downsizing, ease of test, and others. Also, with only being made suitable for LSI, the circuit cannot be applied to a wide range of frequency of the inputted digital audio interface signal.
The present invention is to solve the above conventional problems, and an object thereof is to provide a digital audio signal demodulating apparatus capable of demodulating, through full digitalization, a digital audio interface signal without using any analog PLL circuit in accordance with a reference clock having a relatively low frequency and not necessarily synchronizing with the inputted digital audio interface signal, and also applicable to a wide range of frequency.
To achieve the above object, the present invention has the following aspects.
A first aspect of the present invention is directed to a digital audio interface signal demodulating apparatus for adding a preamble and additional information to a digital audio signal and demodulating a digital audio interface signal bi-phase-modulated for transmission, and the apparatus includes:
an edge detector for generating, whenever detecting an edge of the digital audio interface signal, a pulse-like edge detection signal and a latter-half detection signal indicating that the edge of the digital audio interface signal is present, based on a positive edge of a reference clock having a frequency higher than twice a minimum inverse frequency of the digital audio interface signal and not necessarily synchronizing with the digital audio interface signal;
a count value calculator for obtaining, whenever supplied with the edge detection signal, a count value by counting the edge detection signal in accordance with the reference clock, and calculating a half clock count value by adding, to a value obtained by multiplying the count value by 2, 1 if the latter-half detection signal is supplied, and subtracting 1 from the count value if an immediately preceding latter-half detection signal is supplied;
an approximately 3T detector for obtaining, whenever supplied with the edge detection signal, a count value by counting the edge detection signal in accordance with the reference clock, and generating a first approximately 3T detection signal by detecting a value of the count value within a predetermined range;
an approximately 3T period detector for counting the period of the first approximately 3T detection signal in accordance with the reference clock, and generates first approximately 3T period information;
a decision unit for deciding a modulation period of modulating the digital audio interface signal by comparing the half clock count value with a predetermined table corresponding to the first approximately 3T detection signal, and generating a decision signal;
a preamble detector for detecting the preamble based on the decision signal, and generates a preamble detection signal; and
a bi-phase demodulator for carrying out demodulation, for output, into the digital audio signal from the decision signal with timing of the preamble detection signal.
As stated above, in the first aspect, the edge detection signal is counted, whenever inputted, in accordance with the reference clock and, in the count value, values within a predetermined range are detected for detection of approximately 3T. The period of this approximately 3T is measured, and through table decision determined by the period of the approximately 3T, a demodulation output can be obtained. Thus, only with the reference clock having a low frequency, the apparatus can be applied to a wide range of frequency without using any PLL.
According to a second aspect of the present invention, in the first aspect, the edge detector
generates a first extracted signal extracted from the digital audio interface signal based on the reference clock,
generates a first inverse extracted signal extracted from the digital audio interface signal based on an inverse clock of the reference clock and further based on the reference clock, and
outputs the edge detection signal by detecting an edge of the first extracted signal, and generates; the latter-half detection signal by XORing the first extracted signal and the first inverse extracted signal.
According to a third aspect of the present invention, in the first aspect, the apparatus further includes a digital filter for filtering the first approximately 3T period information, and generating second approximately 3T period information, wherein
the decision unit generates the decision signal by comparing the half clock count value with a predetermined table corresponding to the second approximately 3T period information.
As stated above, in the third aspect, even if the first approximately 3T period information is fluctuated caused by erroneous detection due to noise and other factors, stable approximately 3T period information can be obtained. Also, slow fluctuations of the approximately 3T period information can be followed, and therefore the period can be correctly decided in the decision unit.
According to a fourth aspect of the present invention, in the first aspect, the apparatus further includes a limiter for suppressing the first approximately 3T detection signal for a predetermined time period, and then outputting as a second approximately 3T detection signal, wherein
the approximately 3T period detector counts the period of the second approximately 3T detection signal in accordance with the reference clock.
As stated above, in the fourth aspect, the limiter provided between the approximately 3T detector and the approximately 3T period detector detects the first approximately 3T even if the 3Ts in the preamble are close to each other, and adds a limit signal so that the approximately 3T detection signal is not outputted during a predetermined period from the trailing edge of the approximately 3T detection signal for limiting the approximately 3T period information. Thus, more correct approximately 3T period information can be outputted.
According to a fifth aspect of the present invention, in the first aspect, the apparatus further includes a limiter for suppressing the first approximately 3T detection signal for a predetermined time period, and then outputting as a second approximately 3T detection signal; and
a digital filter for filtering the first approximately 3T period information and generating second approximately 3T period information, wherein
the approximately 3T period detector counts a period of the second approximately 3T detection signal in accordance with the reference clock, and
the decision unit generates the decision signal indicating the period of modulating the digital audio interface signal by comparing the half clock count value with a predetermined table corresponding to the second approximately 3T period information.
As stated above, in the fifth aspect, the effects in the above third and fourth aspects can be simultaneously obtained.
A sixth aspect of the present invention is directed a digital audio interface signal demodulating apparatus for adding a preamble and additional information to a digital audio signal and demodulating a digital audio interface signal bi-phase-modulated for transmission, and the apparatus includes:
an edge detector for generating, whenever detecting an edge of the digital audio interface signal, a pulse-like edge detection signal and a latter-half detection signal indicating that the edge of the digital audio interface signal is present, based on a positive edge of a reference clock having a frequency higher than twice a minimum inverse frequency of the digital audio interface signal and not necessarily synchronizing with the digital audio interface signal;
a count value calculator for obtaining, whenever supplied with the edge detection signal, a count value by counting the edge detection signal in accordance with the reference clock, and calculating a half clock count value by adding, to a value obtained by multiplying the count value by 2, 1 if the latter-half detection signal is supplied, and subtracting 1 from the count value if an immediately preceding latter-half detection signal is supplied;
an approximately 3T detector for generating a third approximately 3T detection signal by detecting a value of the half clock count value within a predetermined range;
an approximately 3T period detector for counting a period of the third approximately 3T detection signal in accordance with the reference clock, and generates first approximately 3T period information;
a decision unit for deciding a modulation period of modulating the digital audio interface signal by comparing the half clock count value with a predetermined table corresponding to the first approximately 3T detection signal, and generating a decision signal;
a preamble detector for detecting the preamble based on the decision signal, and generates a preamble detection signal; and
a bi-phase demodulator for carrying out demodulation, for output, into the digital audio signal from the decision signal with timing of the preamble detection signal.
As stated above, in the sixth aspect, edge detection is carried out on the digital audio interface signal on both of the positive and negative edges of the reference clock, and from a detection output, the count value is obtained at a half clock of the reference clock. Thus, more correct approximately 3T detection can be performed, and therefore more correct approximately 3T information can be outputted.
According to a seventh aspect of the present invention, in the first aspect, the apparatus further includes a switching unit for switching among a plurality of predetermined tables corresponding to the first approximately 3T period information.
As stated above, in the seventh aspect, the count value output from the approximately 3T period detector has an effect to automatically change decision criteria. Thus, it is possible to provide a demodulating apparatus applicable to a wide range of frequency.
According to an eighth aspect of the present invention, in the first aspect, the modulation period is any one of once, twice, and three times an inverse of the minimum inverse frequency.